1. Field of the Invention
The invention relates to D-C to D-C converters and more particularly to zero-voltage switched regulated converters having high conversion efficiency at high operating frequencies and having a small physical size and weight.
2. Description of the Relevant Art
Non-dissipating power converters fall into two general categories: pulse-width modulated converters and resonant or quasi-resonant frequency modulated converters. Pulse width modulated converters operate in a constant-frequency, variable pulse-width mode (PWM) and resonant or quasi-resonant converters operate in a constant pulse-width, variable frequency mode.
A schematic of a basic boost PWM converter is shown in FIG. 1. The boost converter comprises an input capacitor 10, an output capacitor 11, an inductor 12, a MOS field-effect transistor (MOSFET) 13, and a diode 14. The gate of MOSFET 13 is connected to a control circuit 16 which controls the conducting and non-conducting states of MOSFET 13. When an input source (not shown) is connected at the V.sub.in terminals, an output voltage is available across a load 15.
The ideal boost PWM converter operates in three basic steps as shown in the modelled circuits of FIGS. 1(a), 1(b), and 1(c). MOSFET 13 is modelled within FIGS. 1(a), 1(b) and 1(c) as a power switch 13a controlled by control 16. During the first step, referred to as the inductor charge stage and modelled by the circuit of FIG. 1(a), switch 13a is closed in response to control circuit 16 and the current through inductor 12 rises linearly to a maximum level when switch 13a is opened. Output power is supplied to a load 15 with energy previously stored in output capacitor 11.
During the second step, referred to as the induction discharge stage and modelled by the circuit of FIG. 1(b), switch 13a is opened and the voltage across inductor 12 changes polarity and rises to the difference between the input voltage level and the output voltage level. The energy stored by inductor 12 is linearly discharged into load 15. During this time, the input source is also supplying energy to load 15 and charges output capacitor 11.
During the third step, referred to as the dead time stage and modelled by the circuit of FIG. 1(c), inductor 12a has been 12 completely depleted of its energy and power switch 13a is still open. During this step, pass diode 14 (shown in FIG. 1) prevents the flow of current from output filter capacitor 11 back to the input source. Output power is supplied to load 15 by output capacitor 11.
Each of the three steps of the ideal boost PWM converter may be described in conjunction with the current and voltage relationships at inductor 12 and power switch 13a. FIGS. 1(d)-1(f) show graphs of the gate drive voltage V.sub.g to MOSFET 13 versus time, the current I.sub.L through inductor 12 versus time, and the voltage V.sub.L across inductor 12 versus time. FIGS. 1(g)-1(i) show graphs of the gate drive voltage V.sub.g to MOSFET 13 versus time, the current I.sub.s through power switch 13a versus time, and the voltage V.sub.s across power switch 13a versus time.
During step 1 when power switch 13a is closed (when the gate drive voltage V.sub.g is at level V.sub.gate), the current through inductor 13 rises linearly to a level I.sub.peak defined by the applied input voltage and the circuit impedance. The voltage across inductor 12 is approximately equal to the input voltage V.sub.in. The voltage across power switch 13a is negligible.
When control circuit 16 removes the gate drive pulse V.sub.g, power switch 13a opens and the voltage V.sub.L across inductor 12 falls to a level such that pass diode 14 is forward biased. Thus, energy passes through pass diode 14 to load 15. At this time, the voltage across inductor 12 is the difference between the output voltage and the input voltage, and the voltage V.sub.s across power switch 13a rises to the output voltage level.
The energy stored in inductor 12 during the time when power switch 13a was closed is gradually depleted. Diode 14 blocks the back flow of current from the output terminals into the input source. At this time, the current through and the voltage across inductor 12 is zero, and the voltage across switch 13a is at the input voltage level. In succession, controller 16 applies another gate drive voltage and the cycle is repeated.
The amount of energy transferred to the output (load is dependent upon the amount of time that switch 13a is closed, called the pulse-width, and the amount of time required to discharge inductor 12. Faraday's law states that the volt-second product of an inductor must be equal for both the charge and discharge cycles. If the time to charge inductor 12 is called ton and the discharge time is called t.sub.d, then the volt-second product of the inductor is written EQU V.sub.i t.sub.on =(V.sub.o -V.sub.i)t.sub.d. ( 1)
Solving V.sub.o the equation for the voltage conversion ratio, V.sub.i, one obtains, ##EQU1##
Replacing the times t.sub.on and t.sub.d by normalized values d.sub.1 and d.sub.2 where d.sub.1 is the ratio of the on-time to the total switch period and d.sub.2 is the ratio of the discharge time to the total switch period, then ##EQU2##
The voltage conversion ratio can also be expressed as a function of output load 15. Since the boundary conditions on inductor 12 are equal for both charge and discharge periods, i.e., they both have a peak value of I.sub.p and a minimum value of zero, the average current for both periods are equal. The average current through inductor 12 is one half of the peak value since it is triangular in shape. The peak value of the current occurs at the end of the on period and is given by ##EQU3## resulting in an average current during charge of ##EQU4## The average current during discharge is given by ##EQU5## where R is the resistance of load 15 and T is the total switching period. Equating equations (5) and (6) yields a voltage conversation ratio of ##EQU6## This equation is used for determining the range of values for which the converter will operate in the discontinuous mode, and is used for determining the proper size inductor for a given load to maintain regulation at the desired operating frequency.
Further descriptions of the basic boost PWM converter as well as for other converter techniques may be found in the following references, which are incorporated herein by reference: K. Liu, "High-frequency quasi-resonant converter techniques," Ph.D. Dissertation, Electrical Engineering Department, Virginia Polytechnic Institute and State University, 1986; John G. Kassakian and Martin F. Schlecht, "High-frequency high-density converters for distributed power supply systems," IEEE Proceedings, v. 36, no. 4, pp. 362-376, April 1988; Fred C. Lee, "High-frequency quasi-resonant converter technologies," IEEE Proceedings, v. 36, no. 4, pp. 337-390, April 1988; Eugene R. Hnatek, Design of Solid-State Power Supplies, Second Edition, Van Nostrand Reinhold Company, 1981; and George C. Chryssis, High-Frequency Switching Power Supplies, Theory and Design, Second Edition, McGraw Hill Publishing Co., New York, 1989.
For converter circuits in general, it has been a goal to minimize switching losses at high frequencies. Additional goals include minimizing stress on switching elements and minimizing unwanted electromagnetic interference.
For an ideal converter, optimal characteristics would be achieved by meeting the five following basic criteria: 1) turning the power switch on with zero voltage across it; 2) turning the power switch off when zero current is flowing through it; 3) minimizing the current flow for given load requirements; 4) minimizing the maximum voltage across the power switch; and 5) minimizing the peak-to-average current ratio through the power switch. Unfortunately, an ideal converter meeting all these basic criteria is currently unavailable in practice.
The ability to switch under a zero drain-to-source MOSFET potential allows a basic PWM converter to attain switching frequencies in the range of several megahertz without undergoing turn-on losses in the switch. The motivation for operation at higher frequencies is that as frequency increases, the energy storage elements in the converter become smaller and thus the converter can be packaged in a smaller volume. In addition, operation at higher frequencies increases the transient response of the regulated converter. Increased transient response allows the converter to respond more quickly to load variations. Furthermore, the gate drive power is markedly reduced when the power switch is turned on under zero voltage because there is no Miller effect capacitance.
For the basic PWM boost converter of FIG. 1, losses are generated when the energy stored in the drain-to-source capacitance of MOSFET 13 is dissipated at turn-on. With a typical circuit capacitance of 200 pF, a power switch operating at 1 MHz boosting in a discontinuous mode from 150 volts to 300 volts could be expected to dissipate 2.25 watts. For operations in the 5 MHz range, power dissipation could exceed 12.5 watts. For continuous mode regulators, losses would be 9 and 45 watts respectively. This level of power dissipation cannot be tolerated in an efficient converter.
Zero voltage switching is achieved with the zero-voltage switched family of quasi-resonant converters. However, the maximum voltage across the switch in a zero-voltage switched quasi-resonant converter is over twice the output voltage of the converter. This requires that the switch be designed for the peak voltage which is twice the output voltage. A switch having a higher voltage capability typically has increased channel resistance, resulting in increased conduction losses.
For the PWM converter, the peak voltage across the switch is equal to the output voltage. Hence, conduction losses are minimized in PWM converters.
The ability to turn off under zero current allows the transient dissipation of the switch to be zero at turn-off because the product of voltage and current through the switch is zero when the switch is commutated. The zero-current switched family of resonant converters provide this type of characteristic.
The optimal waveform for transferring energy through a power switch is a square current waveform proportional to the required output current. The PWM converter of FIG. 1 has a triangular shaped current waveform with the peak value of current occurring at turn-off. The value of the peak current level is proportional to the required output current to supply the given load. The zero-current switched resonant converter family utilizes a half-sinusoid current waveform with constant amplitude, regardless of the magnitude of output requirements. The zero-voltage switched family of quasi-resonant converters yields a fairly square current pulse, but is independent of load and is based on the maximum load requirement.
As indicated above, neither the basic PWM boost converter nor the resonant or quasi-resonant converter families provide for each of the five basic criteria for optimal operating characteristics. A D-C to D-C converter which provides for a more optimal operation is desirable.